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ISL84521, ISL84522, ISL84523
Data Sheet July 2003 FN6031.2
Low-Voltage, Single and Dual Supply, Quad SPST, Analog Switches
The Intersil ISL84521, ISL84523, ISL84523 devices are CMOS, precision, quad analog switches designed to operate from a single +2V to +12V supply or from a 2V to 6V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (<1W), low leakage currents (1nA max), and fast switching speeds (tON = 45ns, tOFF = 15ns). A12 maximum RON flatness ensures signal fidelity, while channel-to-channel mismatch is guaranteed to be less than 4. The ISL84521, ISL84522, ISL84523 are quad single-pole/ single-throw (SPST) devices. The ISL84521 has four normally closed (NC) switches; the ISL84522 has four normally open (NO) switches; the ISL84523 has two NO and two NC switches and can be used as a dual SPDT, or a dual 2:1 multiplexer. Table summarizes the performance of this family. For higher performance, pin compatible versions and 3mm x 3mm Quad No-Lead Flatpack (QFN) package see the ISL43140, ISL43142 data sheet.
TABLE 1. FEATURES AT A GLANCE ISL84521 Number of Switches Configuration 5V RON 5V tON/tOFF 5V RON 5V tON/tOFF 3V RON 3V tON/tOFF Packages 4 All NC 65 45ns/15ns 125 60ns/20ns 260 120ns/40ns ISL84522 4 All NO 65 45ns/15ns 125 60ns/20ns 260 120ns/40ns ISL84523 4 2 NC/2 NO 65 45ns/15ns 125 60ns/20ns 260 120ns/40ns
Features
* Drop-in Replacements for MAX4521 - MAX4523 * Four Separately Controlled SPST Switches * Pin Compatible with DG411, DG412, DG413 * ON Resistance (RON Max.) . . . . . . . . . . . . . . . . . . . 100 * RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1 * Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<1W * Low Leakage Current (Max at 85oC) . . . . . . . . . . . . 10nA * Fast Switching Action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15ns * Break before Make Timing * Minimum 2000V ESD Protection per Method 3015.7 * TTL, CMOS Compatible
Applications
* Battery Powered, Handheld, and Portable Equipment - Cellular/Mobile Phones - Pagers - Laptops, Notebooks, Palmtops * Communications Systems - Military Radios - RF "Tee" Switches * Test Equipment - Ultrasound - Electrocardiograph * Heads-Up Displays * Audio and Video Switching * General Purpose Circuits - +3V/+5V DACs and ADCs - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing
16 Ld SOIC (N), 16 Ld TSSOP
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL84521, ISL84522, ISL84523 Pinouts
(Note 1) ISL84521 (SOIC, TSSOP) TOP VIEW
IN1 1 COM1 2 NC1 3 V- 4 GND 5 NC4 6 COM4 7 IN4 8 16 IN2 15 COM2 14 NC2 13 V+ 12 N.C. 11 NC3 10 COM3 9 IN3
ISL84522 (SOIC, TSSOP) TOP VIEW
IN1 1 COM1 2 NO1 3 V- 4 GND 5 NO4 6 COM4 7 IN4 8 16 IN2 15 COM2 14 NO2 13 V+ 12 N.C. 11 NO3 10 COM3 9 IN3
ISL84523 (SOIC, TSSOP) TOP VIEW
IN1 1 COM1 2 NO1 3 V- 4 GND 5 NO4 6 COM4 7 IN4 8 16 IN2 15 COM2 14 NC2 13 V+ 12 N.C. 11 NC3 10 COM3 9 IN3
NOTE: 1. Switches Shown for Logic "0" Input.
Truth Table
ISL84521 LOGIC 0 1 NOTE: SW 1, 2, 3, 4 On Off ISL84522 SW 1, 2, 3, 4 Off On ISL84523 SW 1, 4 Off On SW 2, 3 On Off
Ordering Information
PART NO. (NOTE 2) ISL84521IB ISL84521IV ISL84522IB ISL84522IV TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 16 Ld SOIC (N) 16 Ld TSSOP 16 Ld SOIC (N) 16 Ld TSSOP 16 Ld SOIC (N) 16 Ld TSSOP PKG. DWG. # M16.15 M16.173 M16.15 M16.173 M16.15 M16.173
Logic "0" 0.8V. Logic "1" 2.4V.
Pin Descriptions
PIN V+ VGND IN COM NO NC N.C. FUNCTION Positive Power Supply Input Negative Power Supply Input. Connect to GND for Single Supply Configurations. Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin No Internal Connection
ISL84523IB ISL84523IV NOTE:
2. Most surface mount devices are available on tape and reel; add "-T" to suffix.
2
ISL84521, ISL84522, ISL84523
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V All Other Pins (Note 3) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 10mA Peak Current, IN, NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 20mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . > 2kV
Thermal Information
Thermal Resistance (Typical, Note 4) JA (oC/W) 16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . 115 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 150 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Moisture Sensitivity (See Technical Brief TB363) All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range. . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only)
Operating Conditions
Temperature Range ISL8452XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 3. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications +5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full (NOTE 6) MIN V-1 -10 -1 -10 -2 -20 0.8 -1 5 TYP 65 1 7 0.01 0.01 0.01 1.6 1.6 0.03 45 15 20 1 2 2 5 (NOTE 6) MAX UNITS V+ 100 125 4 6 12 15 1 10 1 10 2 20 2.4 1 80 100 30 40 5 V nA nA nA nA nA nA V V A ns ns ns ns ns pC pF pF pF
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
VS = 5V, ICOM = 1.0mA, VNO or VNC = 3V (Figure 5) VS = 5V, ICOM = 1.0mA, VNO or VNC = 3V VS = 5V, ICOM = 1.0mA, VNO or VNC = 3V (Note 8) VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V (Note 7) VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V (Note 7) VS = 5.5V, VCOM = VNO or VNC = 4.5V (Note 7)
25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL84523), tD Charge Injection, Q COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 1) VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 1) VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (Figure 2) f = 1MHz, VNO or VNC = VCOM = 0V (Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V (Figure 7) 25 Full 25 Full 25 25 25 25 25 VS = 5.5V, VIN = 0V or V+
Full
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (Figure 7)
3
ISL84521, ISL84522, ISL84523
Electrical Specifications +5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEST CONDITIONS RL = 50, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS, (See Figures 4 and 6) TEMP (oC) 25 25 Full VS = 5.5V, VIN = 0V or V+, Switch On or Off 25 Full Negative Supply Current, INOTES: 5. VIN = Input voltage to perform proper function. 6. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC. 8. Flatness is defined as the delta between the maximum and minimum RON values over the specified voltage range. 9. Between any two switches. 25 Full (NOTE 6) MIN 2 -1 -1 -1 -1 TYP >90 <-90 0.05 0.05 (NOTE 6) MAX UNITS 6 1 1 1 1 dB dB V A A A A
PARAMETER OFF Isolation Crosstalk, (Note 9) Power Supply Range Positive Supply Current, I+
POWER SUPPLY CHARACTERISTICS
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full MIN (NOTE 6) 0 -1 -10 -1 -10 -2 -20 0.8 -1 10 TYP 125 2 0.01 0.01 1.6 1.6 0.03 60 20 30 1 MAX (NOTE 6) UNITS V+ 200 250 8 10 1 10 1 10 2 20 2.4 1 100 150 50 75 5 V nA nA nA nA nA nA V V A ns ns ns ns ns pC
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V (Figure 5) V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3.5V V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V (Note 7) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V (Note 7) V+ = 5.5V, VCOM = 1V, 4.5V (Note 7)
25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL84523), tD Charge Injection, Q V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 1) V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 1) V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (Figure 2) 25 Full 25 Full 25 25 V+ = 5.5V, VIN = 0V or V+
Full
4
ISL84521, ISL84522, ISL84523
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEST CONDITIONS V+ = 5.5V, VIN = 0V or V+, Switch On or Off TEMP (oC) 25 Full Negative Supply Current, I25 Full MIN (NOTE 6) -1 -1 -1 -1 TYP 0.05 0.05 MAX (NOTE 6) UNITS 1 1 1 1 A A A A
PARAMETER POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+
Electrical Specifications 3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full MIN (NOTE 6) 0 0.8 -1 15 -1 -1 -1 -1 TYP 260 1.6 1.6 0.03 120 40 50 0.5 0.05 0.05 MAX (NOTE 6) UNITS V+ 500 600 2.4 1 250 300 80 100 5 1 1 1 1 V V V A ns ns ns ns ns pC A A A A
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
V+ = 2.7V, ICOM = 0.1mA, VNO or VNC = 1V
25 Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL84523), tD Charge Injection, Q Positive Supply Current, I+ Negative Supply Current, IV+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to V+ (Figure 1) V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to V+ (Figure 1) V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V (Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (Figure 2) V+ = 3.6V, VIN = 0V or V+, Switch On or Off 25 Full 25 Full 25 25 25 Full 25 Full V+ = 3.6V, VIN = 0V or V+ Full Full Full
POWER SUPPLY CHARACTERISTICS
Test Circuits and Waveforms
3V LOGIC INPUT 50% 0V tOFF SWITCH VNX INPUT VOUT 90% SWITCH OUTPUT 0V tON 90% GND LOGIC INPUT VC VNX tr < 20ns tf < 20ns C SWITCH INPUT NO OR NC COM IN RL 300 CL 35pF VOUT V+ C
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) -----------------------------R +R
L ( ON )
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
5
ISL84521, ISL84522, ISL84523 Test Circuits and Waveforms (Continued)
V+ C
SWITCH OUTPUT VOUT
VOUT
RG
NO OR NC
COM
VOUT
3V LOGIC INPUT ON OFF 0V Q = VOUT x CL C VON VG GND IN CL
LOGIC INPUT
Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
C
C 3V LOGIC INPUT 0V VNX
NO1
VOUT1 COM1 VOUT2 RL1 300 CL1 35pF
NC2
COM2 IN1 SWITCH OUTPUT VOUT1 90% 0V LOGIC INPUT SWITCH OUTPUT VOUT2 90% 0V 90% C tD tD V90% IN2 GND RL2 300
CL2 35pF
CL includes fixture and stray capacitance. Reconfigure accordingly to test SW3 and SW4.
FIGURE 3B. TEST CIRCUIT FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME (ISL84523 ONLY)
V+ C SIGNAL GENERATOR RON = V1/1mA
NO OR NC NO OR NC
V+ C
VNX IN 0V OR 2.4V 1mA V1 IN 0.8V OR 2.4V
ANALYZER RL
COM
COM
GND
GND
C VV-
C
Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST CIRCUIT
Repeat test for all switches. FIGURE 5. RON TEST CIRCUIT
6
ISL84521, ISL84522, ISL84523 Test Circuits and Waveforms (Continued)
V+ C V+
SIGNAL GENERATOR
NO1 OR NC1
COM1
50
NO OR NC
IN2 0V or 2.4V IN IN2 0V OR 2.4V NO CONNECTION IMPEDANCE ANALYZER
COM
0V OR 2.4V
ANALYZER RL
COM2
NO2 OR NC2
GND
GND
C V-
V-
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL84521, ISL84522, ISL84523 quad analog switches offer precise switching capability from a bipolar 2V to 6V or a single 2V to 12V supply with low on-resistance (65) and high speed switching (tON = 45ns, tOFF = 15ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (1W) and low leakage currents (1nA max). High frequency applications also benefit from the wide bandwidth, and the very high OFF isolation and crosstalk rejection.
unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO OR NC VCOM
Supply Sequencing And Overvoltage Protection
As with any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (Figure 8). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is
VOPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL8452X construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL8452X 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (6V or 12V single supply), as well as room for overshoot and noise spikes. This family of switches performs equally well when operated with bipolar or single voltage supplies, and bipolar supplies need not be symmetrical. The minimum recommended supply voltage is 2V or 2V. It is important to note that the input signal range, switching times, and ON-resistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance Curves for details.
7
ISL84521, ISL84522, ISL84523
V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals, so switch parameters especially RON - are strong functions of both supplies. another. Figure 16 details the high OFF Isolation and Crosstalk rejection provided by this family. At 10MHz, OFF isolation is about 50dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease OFF Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This switch family is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.5V to 10V. At 12V the VIH level is about 2.7V, so for best results use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND.
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 300MHz (Figure 15), with a small signal -3dB bandwidth in excess of 400MHz, and a large signal bandwidth exceeding 300MHz. An off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch's input to its output. OFF Isolation is the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to
Typical Performance Curves TA = 25oC, Unless Otherwise Specified
90 80 70 60 50 RON () 40 250 V- = 0V 200 85oC 150 100 50 0 3 4 5 6 7 8 V+ (V) 9 10 11 12 -40oC 25oC V- = -5V 85oC 25oC -40oC VCOM = (V+) - 1V ICOM = 1mA 300 250 200 150 100 50 225 175 125 75 140 110 80 50 0 1 2 3 VCOM (V) 4 85oC 25oC -40oC 85oC 25oC -40oC 5 V+ = 5V V- = 0V V+ = 3.3V V- = 0V ICOM = 1mA 85oC 25oC -40oC V+ = 2.7V V- = 0V
RON ()
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
8
ISL84521, ISL84522, ISL84523 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
180 ICOM = 1mA 140 85oC 100 -40oC 60 120 RON () 100 80 60 40 90 70 50 30 -5 -4 -3 -2 -1 0 VCOM (V) 1 2 3 -40oC 4 5 85oC 25oC -7.5 -5 -2.5 0 VCOM (V) 2.5 5 VS = 5V -5 85oC V+ = 3.3V VS = 3V Q (pC) 25oC -40oC 0 V+ = 5V 2.5 VS = 5V 25oC 2.5 VS = 2V 5
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
250 200 150 100 50 tON (ns) 0 300 250 200 150 100 50 0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 -40oC 85oC 25oC -40oC V- = 0V 25oC -40oC 25oC 85oC V- = -5V VCOM = (V+) - 1V
125 100 75 50 25 tOFF (ns) 0 50
25oC -40oC 25oC
V- = -5V
VCOM = (V+) - 1V
85oC -40oC
V- = 0V 40 30 20 10 -40oC 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 85oC 25oC
FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 14. TURN - OFF TIME vs SUPPLY VOLTAGE
9
ISL84521, ISL84522, ISL84523 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
NORMALIZED GAIN (dB) -10 VS = 5V 3 GAIN 0 CROSSTALK (dB) -3 VIN = 5VP-P VIN = 0.2VP-P V+ = 3V to 12V or -20 VS = 2V to 5V -30 -40 -50 -60 -70 -80 CROSSTALK -90 -100 -110 1k 90 100 110 500M ISOLATION RL = 50 10 20 30 OFF ISOLATION (dB) 40 50 60 70 80
PHASE VIN = 0.2VP-P
45 90 VIN = 5VP-P 135 180 RL = 50 1 10 100 FREQUENCY (MHz) 600
PHASE (DEGREES)
0
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE
FIGURE 16. CROSSTALK AND OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: ISL84521: 188 ISL84522: 188 ISL84523: 188 PROCESS: Si Gate CMOS
10
ISL84521, ISL84522, ISL84523 Small Outline Plastic Packages (SOIC)
N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45o 0.25(0.010) M BM
M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL A A1 B MIN 0.053 0.004 0.014 0.007 0.386 0.150 MAX 0.069 0.010 0.019 0.010 0.394 0.157 MILLIMETERS MIN 1.35 0.10 0.35 0.19 9.80 3.80 MAX 1.75 0.25 0.49 0.25 10.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 1 02/02
L
C D E e H h
C
0.050 BSC 0.228 0.010 0.016 16 0o 8o 0.244 0.020 0.050
1.27 BSC 5.80 0.25 0.40 16 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS

A1 0.10(0.004)
L N
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
11
ISL84521, ISL84522, ISL84523 Thin Shrink Small Outline Plastic Packages (TSSOP)
N INDEX AREA E E1 -B1 2 3 L 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 GAUGE PLANE 0.25(0.010) M BM
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D MIN 0.002 0.033 0.0075 0.0035 0.193 0.169 MAX 0.043 0.006 0.037 0.012 0.008 0.201 0.177 MILLIMETERS MIN 0.05 0.85 0.19 0.09 4.90 4.30 MAX 1.10 0.15 0.95 0.30 0.20 5.10 4.50 NOTES 9 3 4 6 7 8o Rev. 1 2/02
A1 0.10(0.004) A2 c
E1 e E L N
e
b 0.10(0.004) M C AM BS
0.026 BSC 0.246 0.020 16 0o 8o 0.256 0.028
0.65 BSC 6.25 0.50 16 0o 6.50 0.70
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
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